STS Technical Services
About The Company:
SEAKR Engineering is a Colorado company and aerospace innovator. They build, design and manufacture advanced electronics for space applications including solar system exploration, space-based U.S. defense support and commercial satellite communications. SEAKR offers a casual work culture in a fast-paced engineering environment. This provides our engineers with the opportunity to contribute real solutions to real-world engineering challenges. If you’re ready to join one of the most talented engineering organizations in the aerospace industry, SEAKR is the place for you.
We are hiring an ASIC Engineer who is highly motivated and has a strong background to work seamlessly with SEAKR’s ASIC Design team; a team that is focused on ASIC Static Timing Analysis and other physical design tasks.
- Knowledge of ASIC implementation, ASIC design flow and timing closure are required
- Knowledge of ASIC Design for Test (DFT) is a plus
- SEAKRs focus is on leading edge radiation hardened ASIC design for spaceflight
- Candidates must have excellent verbal and written communication skills and be able to demonstrate strong analytical and problems solving skills
- We are seeking an experienced engineer who has technical mastery of the entire ASIC development flow, as well as the skills to interface with ASIC foundries and manage the foundry technical interchange
- The candidate must have experience with Synthesis (Synopsys DC) and Static Timing (Primetime)
- The candidate must have experience with constraints development and analysis, ASIC timing closure and RTL (VHDL/Verilog/SystemVerilog) coding
- A working knowledge of ICC and ASIC layout and floorplanning is a plus
- The ASIC Engineer must be able to work with designers and system engineers to analyze timing requirements and must be able to architect/design blocks for critical timing
- The preferred candidate shall have an understanding of design for test (DFT), ATPG vector generation and functional manufacturing testing and shall have experience with Memory Self-Test (BIST/BISR)
- Digital design experience related to ASIC design is required
- The preferred candidate understands JTAG/Tap Network, Scan, Boundary Scan, IO DFT, DDR/Serial IO and Gate Level Simulations
- Experience using DC Ultra, Designware and Power Compiler is desired
- Expertise in hierarchical synthesis techniques and clock gating for power reduction is a plus
- Experience with Primetime SI, DFT Advisor and Fastscan/Tetramax is desired
- Experience with Tessent RAM self-test / self-repair tools is a plus
- Experience with Logical Equivalency checking (Formality) and power analysis is desired
- Experience with Cadence ASIC physical design tools is a plus
- A Bachelor’s degree in Electrical Engineering or Computer Science is required; a Masters degree in Electrical Engineering or Computer Science is desired
- Must have at least 10 years of ASIC implementation experience
- U.S. Citizenship required
- SEAKR offers competitive compensation and excellent benefits.
Since this is a direct hire job, our client will provide a full benefits package to you. If you would like to learn more about that package, please call 1-720-446-2688.
Thanks for taking the time, and we look forward to hearing from you soon.