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Senior Engineers, ASIC Synthesis/STA

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Senior Engineers, ASIC Synthesis/STA

STS

Job type

Permanent

Category

Aerospace Engineering Jobs

Job ID

Special Project

SEAKR Engineering

STS Technical Services, in partnership with SEAKR Engineering, is hiring Senior Engineers, ASIC Synthesis/STA in Denver, Colorado!

About The Company:

Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space.

Job Summary:

Highly motivated ASIC Engineer focused on ASIC Static Timing Analysis and other physical design tasks. Knowledge of ASIC implementation, ASIC design flow and timing closure are required. Knowledge of ASIC Design for Test (DFT) is a plus.

SEAKR’s focus is leading edge radiation hardened ASIC design for spaceflight.

Candidates must have excellent verbal and written communication skills and be able to demonstrate strong analytical and problems solving skills. We are seeking an experienced engineer who has technical mastery of the entire ASIC development flow, as well as the skills to interface with ASIC foundries and manage the foundry technical interchange.

Must Have Experience:

  • Synthesis (Synopsys DC) and Static Timing (Primetime)
  • Constraints development and analysis
  • ASIC timing closure
  • RTL (VHDL/Verilog/System Verilog) coding
  • Working with designers and system engineers to analyze timing requirements
  • Architecting blocks for critical timing
  • Digital design experience related to ASIC design

Preferred Experience :

  • A working knowledge of ICC/Innovus and ASIC layout/floorplanning
  • An understanding of design for test (DFT)
  • Gatelevel simulation setup and debug knowledge
  • Power estimation
  • Hierarchical design/constraint experience
  • Implementation experience in 32nm and below technology nodes

Experience With Following Tools is a Plus:

  • Using DC Ultra, Designware and Power Compiler
  • Hierarchical synthesis techniques and clock gating for power reduction
  • Primetime SI, DFT Advisor and Fastscan/Tetramax
  • Tessent RAM self-test / self-repair tools
  • Logical Equivalency checking (Formality) and power analysis
  • Cadence ASIC physical design tools

Qualifications:

  • A Bachelor’s degree in Electrical Engineering or Computer Science is required
  • Master’s degree in Electrical Engineering or Computer Science is desired.
  • Must have at least 6 years of ASIC implementation experience.

Additional Information:

  • All your information will be kept confidential according to EEO guidelines.
  • US Citizenship Required
  • SEAKR offers competitive compensation and excellent benefits.
  • Location: Colorado, Relocation available

Benefits:

Since this is a direct hire job, SEAKR provide a full benefits package to you. If you would like to learn more about that package, please call 1-800-359-4787 ext. 8576.

Thanks for taking the time, and we look forward to hearing from you soon.

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To apply for this job email your details to Stephanie.Lane@ststechnicaljobs.com

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